Using an illustrative diagram explain the shared disk multi-computer cluster architecture. Also, explain the objectives of highly available server and fault tolerant server design approaches.

Explain the concept and possible justification for multiplexing the data and address signals on the same set of signal lines.

(5 marks)

Describe the functions of the registers that are defined in the Von Neumann model: PC, IR, MAR, MDR. Explain the usage of the registers during instruction fetch cycle.

(5 marks)

In the context of program references to memory, explain the principle of locality and its relevance to the hierarchical organization.

(5 marks)

Given that some Pentium bus runs at 100 MHz, the (data) bus width is 64 bits, and the address bus width is 36 bits. Explain the meaning of those two specifications and determine the bandwidth in mbps.

(5 marks)




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